One of the most rapidly advancing technologies at the present time, electronics, is centered around semiconductors, particularly integrated circuits. According to present practices, semiconductors are mass-produced and installed in highly-sophisticated, complex and costly equipment. As with many mass-produced products, semiconductors are prone to failure, in many cases within the first few thousand hours of operation. The complexity of the equipment within which such semiconductors are installed makes such post-installation failures highly undesirable. For example, when equipment reaches the final inspection stage of production before semiconductor failures are detected, the high level skills required for testing and repair add a significant cost to production expenses. Even more significantly, when the product is in the field and a service technician must make warranty repairs, the costs incurred can have a marked effect on profitability. As a result, manufacturers of electronic equipment are demanding ever greater quality and dependability in commercial grade semiconductors.
Such quality and dependability is enhanced substantially by detection of those semiconductors likely to fail in the first few hours of operation prior to installation of such semiconductors in electronic equipment. One of the most effective methods of making such a detection is referred to as "burn-in". According to burn-in techniques, semiconductors are stressed within their physical and electrical limits prior to installation whereby those semiconductors likely to become early failures in completed equipment can be uncovered. More particularly, burn-in involves placing a large number of semiconductors on one or more printed circuit boards ("component boards"); placing such component boards with the semiconductors mounted thereon in a chamber whose environment, particularly temperature, is controllable; applying dc biases to each semiconductor on each board in such a manner as to reverse, and sometimes forward, bias as many of such semiconductor's junctions as possible, and/or actively clocking each semiconductor, and/or loading the outputs of each semiconductor to maximum rated conditions, such application of dc biases, clocking signals and loads being accomplished substantially simultaneously to each semiconductor; removing the component boards from the chamber after the semiconductors have been subjected to the environmental condition of the chamber and the biases, clocking signals and loads for a designated period of time; and removing the semiconductors from the component boards. The semiconductors can then be electrically tested by applying a room temperature test of critical dc parameters, e.g. input currents and thresholds, output voltages and currents, and, in the case of digital components, by making a functional test to verify truth table performance. In this way, the semiconductors that fail during burn-in are detected and segregated from those that do not fail. Because the semiconductors that do not fail during the burn-in process have withstood substantial stress, such semiconductors possess a high degree of dependability and can be installed in highly complex equipment with confidence that such semiconductors will not fail prematurely.
During burn-in, it is ordinarily desirable to maintain the environment within the burn-in chamber at an extremely high temperature, often about 150.degree. C., and to maintain the temperature gradient throughout the burn-in chamber at approximately zero. In view of such high temperatures, the chamber is usually saturated with an inert gas, such as N.sub.2, in order to minimize I.C. lead tarnish.
Furthermore, because such high temperatures tend to damage and/or to shorten the life of power supplies and circuit components ("clocking components") used in applying dc biases, clocking signals and/or loads to the semiconductors being subjected to burn-in, such power supplies and clocking components ordinarily are positioned outside the chamber.
In the prior art, the power supplies were connected to the component boards by cables extending through the wall of the chamber. The clocking components were mounted on circuit boards ("clocking boards") and each component board was connected to a clocking board by a "through-the-wall" connection. Such through-the-wall connection included a passage through the chamber wall, such passage being covered by a cover plate covering the passage at the inner surface of the chamber wall. The cover plate included two rigid plates having openings therethrough aligned with one another and a rubber gasket having a slit aligned with the plate openings. Each clocking board had a card-edge connector secured thereto and was mounted on the exterior surface of the chamber wall such that the card-edge connector was aligned with the slit of a cover plate. Actual connection of a component board to its corresponding clocking board was made by inserting an edge of the component board through the slit in the gasket and mating such edge with the card-edge connector of the clocking board.
This prior art technique of connecting the component boards to the clocking components and the power supplies has not been satisfactory in that the high-temperature N.sub.2 -rich gas leaks from the chamber at the points where the power supply cable extends through the chamber wall and where the edge of the component board extends through the gasket. As a result, it is difficult not only to maintain the high N.sub.2 concentration but also to maintain the desired temperature gradient of zero since the chamber tends to be cooler adjacent the gasket than in the remainder of the chamber.